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1 Memristor-based mono-stable oscillator A.T. Bahgat and K.N. Salama In this letter, a reactance-less mono-stable oscillator is introduced for the first time using memristors. By replacing bulky inductors and capacitors with memristors, the novel mono-stable oscillator can be an area-efficient solution for on-chip fully integrated systems. The proposed circuit is described, mathematically analysed and verified by circuit simulations. Introduction: In light of HP lab’s 2008 announcement [1], huge interest in memristors has revived and it has been investigated in many circuits and systems [2-5] In this letter, a novel reactance-less mono-stable oscillator is proposed using memristors. The resistance storage property of the memristor replaces the energy storage elements needed for oscillation. The increase/decrease in the memristor resistance according to the polarity of the applied voltage is similar to charging and discharging of capacitors [3]. Memristor-based reactance-less mono-stable oscillator offers a solution in low frequency applications that require large capacitance area or off-chip reactive components. The proposed circuit: The proposed circuit operation depends on the memristor resistance oscillation that is tracked by the memristor voltage . The circuit consists of a voltage divider, a feedback system and two output terminals as shown in Fig. 1. Fig. 1 The proposed memristor-based mono-stable oscillator The voltage divider network is formed between the memristor, a resistor and a small transmission gate resistance . The memristor is connected in a way that its resistance increases when is higher than and vice versa. Since the transmission gate has very low resistance and its resistance changes during the oscillation, is ignored to simplify mathematical solutions. (1) The feedback system consists of two comparators and an AND gate controlling two flip flops. Depending on Vm, the first flip flop controls the voltage connected to the voltage divider network and the second flip flop controls turning the transmission gate on and off. The two outputs of the flip flop are the two output terminals of the circuit. Circuit tracing: Before any external trigger, the oscillator is in the stable state. The transmission gate is turned off and is preserved since no voltage drop across the memristor exists. After the trigger pulse, the behaviour of the circuit changes from ‘stable’ passing to other operation points and goes back to the ‘stable’ point as shown in Fig. 2. : The oscillator enters the unstable operation points. The transmission gate is turned on as high output voltage is applied on both outputs of the two flip flops and . Then, switches its value to according to (2) and the operating point jumps to (a). (2) : At point (a), the voltage difference across the voltage divider is positive. Hence, the memristor resistance increases and accordingly, increases as well until it reaches and the operating point reaches (b). Fig. 2 mono-stable oscillator operation points : At point (b), the value of just passes . So, switches to low output voltage, and changes to following (3). (3) : At point (c), the voltage difference is negative, so the memristor resistance decreases. increases until it reaches and the operating point reaches (d). : At point (d), the value of just passes so switches to low output voltage turning off the transmission gate. This makes the voltage divider network floating and keeps the memristor resistance preserved. This ends of the oscillation cycle of the memristor resistance and the oscillator goes back to the stable state. With each trigger pulse and resistance oscillation cycle, each output pulse has a certain expected pulse width except the first cycle because all cycles start and end with the memristor resistance except the first cycle which starts with the initial memristor resistance . Oscillation condition: In the voltage divider network, for each , there is only one equivalent memristor resistance . The memristor resistance at and is given by (4) Based on circuit tracing, and must be selected such that (5) Since , then from (4), the resistance is restricted by (6) (6) Similar to other mono-stable oscillators, there must be minimum time between two consecutive trigger pulses. This minimum time in the proposed oscillator is the time required for the memristor to finish a complete resistance oscillation which is the second output pulse. In addition, the trigger pulse width must be less than the first output pulse width. The result of violating those two conditions is shown in Fig. 3. Output pulse width: the proposed circuit has two output voltages, and , with different output pulse widths, and in order. The output pulse width of and are determined by (7) (8) For the circuit mathematical analysis, a developed mathematical model for HP memristor is used to analyse the circuit mathematically [6,7]. The memristor resistance as a function of time is given by (9) where the constant is defined as and is the voltage difference across the memristor. By solving the integration for the time required for the memristor resistance to increase from to and substituting into (1). Then is given by (10) 2 Similarly, the time required for the memristor resistance to decrease from to , , is given by (11) From the equations (4), (10) and (11), the ratio between the widths of the two output pulses, and , is determined by (12) Circuit simulation: As the access to the experimental realisation of the memristor is very limited, researchers resort to SPICE and behavioural models of the HP memristor [8], or emulate the memristor model using active circuitry [4]. The proposed circuit was simulated and the memristor parameters, , and , were chosen to be and respectively [3,7]. Circuit parameters, , , and , were choosed to be , , , and respectively. Fig. 3 shows the transient simulation results showing excellent matching with the mathematical analysis. The memristor resistance oscillates between Rmn and Rmp, which defines the location of the operating points. By substituting the memristor and the circuit prammeters into (4), (10) and (11) : = 5.3 , = 12 , = 0.58 sec and = 1.176 sec. Fig. 3 the behavior of the mono-stable oscillator. (a) shows memristor resistance, , oscillation (b) shows changing between , and (c) shows trigger pulse (d) shows pulses (e) shows pulses Fig.4 shows the effect of on the width of the output pulses. Simulations were run choosing as values for our circuit parameters. Both simulations and calculations match with an error of approximately 2%. This error is expected because the resistance of the transmission gate is ignored to simplify the mathematical expression. Fig.4 simulated and calculated first output pulse width vs. Ra Conclusion: This paper proposes a novel reactance-less mono-stable oscillator with a detailed mathematical analysis that is verified by circuit simulation. The design is suitable for low frequency applications. Further, the proposed circuit is general and can be extended to higher frequencies. A.T. Bahgat and K.N. Salama (King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia) E-mail: ahmed.bahgat@kaust.edu.sa References 1 Strukov, D.B., Snider, G.S., and Stewart, D.R.: ‘The missing memristor found’, Nature, 2008, 435, pp. 80–83 2 Shin, S., Kim, K., Kang, S.-M.: ‘Memristive XOR for resistive multiplier’, Electronics Letters, 2012, 48, (2), pp.78–80 3 Zidan, M., Omran, H., Radwan, A.G., and Salama, K.N.: ‘Memristor-based reactance-less oscillator’, Electronics Letters, 2011, 47, (22), pp. 1220–1221 4 Pershin, V., and Di Ventra, M.: ‘Practical approach to programmable analog circuits with memristors’, IEEE Trans. on Circuits and Syst.I, 2010, 57, (8), pp. 1857–1864 5 Shin, S., Kim, K., Kang, S.M.: ‘Memristor applications for programmable analog ICs’, IEEE Trans. in Nanotechnology, 2011, 10, (2), pp. 266–274 6 Radwan, A.G., Zidan, M.A., Salama, K.N.: ‘On the Mathematical Modeling of Memristors’, International Conference on Microelectronics, Cairo, Egypt, 2010, pp. 284–287 7 Radwan, A.G., Zidan, M.A., and Salama, K.N.: ‘HP memristor mathematical model for periodic signals and DC’. IEEE Int. Midwest Symp. on Circuits and Systems, (MWSCAS’10), Seattle, WA, 2010, pp. 861–864 8 Biolek, Z., Biolek, D., and Biolkova, V.: ‘SPICE model of memristor with nonlinear dopant drift’, Radioengineering, 2009, 18, (2), pp. 210–214

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